RISC-V /Debug /Trigger Extra (RV32) (textra32)

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Interpret as Trigger Extra (RV32) (textra32)

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ignore)sselect 0svalue0sbytemask 0 (ignore)mhselect 0mhvalue

sselect=ignore, mhselect=ignore

Description

This register provides access to the trigger selected by {csr-tselect}. The reset values listed here apply to every underlying trigger.

This register is accessible as {csr-tdata3} when {tdata1-type} is 2, 3, 4, 5, or 6 and XLEN=32.

If DXLEN >= 64, then this register provides access to the low bits of each field defined in {csr-textra64}. Writes to this register will clear the high bits of the corresponding fields in {csr-textra64}.

All functionality in this register is optional. Any number of upper bits of {textra32-mhvalue} and {textra32-svalue} may be tied to 0. {textra32-mhselect} and {textra32-sselect} may only support 0 (ignore).

Byte-granular comparison of {csr-scontext} to {textra32-svalue} allows {csr-scontext} to be defined to include more than one element of comparison. For example, software instrumentation can program the {csr-scontext} value to be the concatenation of different ID contexts such as process ID and thread ID. The user can then program byte compares based on {textra32-sbytemask} to include one or more of the contexts in the compare.

Byte masking only applies to {csr-scontext} comparison; i.e when {textra32-sselect} is 1.

đź“Ś NOTE

Note that sselect and mhselect filtering apply in all modes, including M-mode and S-mode. If desired, debuggers can use a trigger’s mode filtering bits to restrict the matching to modes where it considers ASID/VMID/scontext/hcontext to be active.

Fields

sselect

0 (ignore): Ignore {textra32-svalue}.

1 (scontext): This trigger will only match or fire if the low bits of {csr-scontext} equal {textra32-svalue}.

2 (asid): This trigger will only match or fire if:

  • the mode is VS-mode or VU-mode and ASID in vsatp equals the lower ASIDMAX (defined in the Privileged Spec) bits of {textra32-svalue}.
  • in all other modes, ASID in satp equals the lower ASIDMAX (defined in the Privileged Spec) bits of {textra32-svalue}.
svalue

Data used together with {textra32-sselect}.

This field should be tied to 0 when S-mode is not supported.

sbytemask

When the least significant bit of this field is 1, it causes bits 7:0 in the comparison to be ignored, when {textra32-sselect}=1. When the next most significant bit of this field is 1, it causes bits 15:8 to be ignored in the comparison, when {textra32-sselect}=1.

mhselect

0 (ignore): Ignore {textra32-mhvalue}.

4 (mcontext): This trigger will only match or fire if the low bits of {csr-mcontext}/{csr-hcontext} equal {textra32-mhvalue}.

mhvalue

Data used together with {textra32-mhselect}.

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